The precise assembly of nanoscale materials in a desired location and orientation on surfaces makes possible the fabrication of various types of novel structures and devices [1]-[3]. Nanoparticles are model nanoscale building blocks due to their zero-dimensional geometry and unique size-dependent properties [4]. For example, functionalized gold nanoparticles can be used to fabricate sensitive biosensors [5], closely packed metallic nanoparticle arrays show significant electromagnetic field enhancement [6], and silica nanoparticles in predefined arrays enable novel optical devices [7]. Bottom-up nanoparticle-directed assembly processes can be used to fabricate these nanoscale structures. For example, 1-D organization of individual metallic nanoparticles has been used to fabricate 1-D metal nanowires [8]. These structures not only show unique electrical and optical properties [9], [10], but they also provide solutions for the technological and fundamental challenges faced by the conventional top-down fabrication processes in the sub-100 nm regime [11].
Although, many techniques have been developed to integrate nanoparticles directly onto surfaces for various applications [12]-[15], dielectrophoresis (DEP) [16] has been used to manipulate nanoparticles onto electronic devices. Nanoscale interconnects have been fabricated using the advantage of interparticle chain formation, [8]. Electrical characterization of produced in-plane (2-D) [17] and intraplane (3-D) [18] interconnects has been achieved. In these assembly processes, the two electrodes required for applying the electric field are usually on the same substrate or very close to each other (order of microns), making the fabrication techniques unsuitable for specific applications such as interconnects in CMOS-based devices [19] and various types of electromagnetic-field-enhancement sensors. A recent study demonstrates the fabrication of gold nanorods in a porous alumina template using an AC electric field between two electrodes placed 1 μm away from each other [20]. However, the process provided no control over the length of the nanorods, impeding the potential use of the rods in sensors and CMOS interconnect applications.
Carbon nanotubes are considered as a potential candidate material for interconnect applications in gigascale systems [21-24] due to their resistance to electromigration and larger mean free path compared to that of metals. For vertical and lateral interconnects researchers have used high temperature chemical vapor deposition methods to grow carbon nanotubes on pre-patterned substrates. However, these high temperature processes are not compatible with CMOS technology [14,15]. For lateral interconnects researchers have used post-growth assembly techniques such as dielectrophoresis in which only an AC field or an electrical field gradient is used. For local vertical interconnects, the methods that have been carried out are not highly scalable.
Thus, there remains a need to develop methods for the rapid, scalable fabrication of conductive nanorods to serve as interconnects in nanoscale circuitry and devices. The new methods should avoid harsh chemical and physical conditions and should be consistent with CMOS fabrication techniques.